 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| MCP6031/2/3/4 0.9 A, High Precision Op Amps Features * * * * * * * * Rail-to-Rail Input and Output Low Offset Voltage: 150 V (maximum) Ultra Low Quiescent Current: 0.9 A (typical) Wide Power Supply Voltage: 1.8V to 5.5V Gain Bandwidth Product: 10 kHz (typical) Unity Gain Stable Chip Select (CS) capability: MCP6033 Extended Temperature Range: - -40C to +125C * No Phase Reversal Description The Microchip Technology Inc. MCP6031/2/3/4 family of operational amplifiers (op amps) operate with a single supply voltage as low as 1.8V, while drawing ultra low quiescent current per amplifier (0.9 A, typical). This family also has low input offset voltage (150 V, maximum) and rail-to-rail input and output operation. This combination of features supports battery-powered and portable applications. The MCP6031/2/3/4 family is unity gain stable and has a gain bandwidth product of 10 kHz (typical). These specs make these op amps appropriate for low frequency applications, such as battery current monitoring and sensor conditioning. The MCP6031/2/3/4 family is offered in single (MCP6031), single with power saving Chip Select (CS) input (MCP6033), dual (MCP6032), and quad (MCP6034) configurations. The MCP6031/2/3/4 family is designed with Microchip's advanced CMOS process. All devices are available in the extended temperature range, with a power supply range of 1.8V to 5.5V. Applications * * * * * Toll Booth Tags Wearable Products Battery Current Monitoring Sensor Conditioning Battery Powered Design Aids * * * * * * SPICE Macro Models FilterLab(R) Software MindiTM Simulation Tool MAPS (Microchip Advanced Part Selector) Analog Demonstration and Evaluation Boards Application Notes Package Types MCP6031 SOIC, MSOP NC 1 VIN- 2 VIN+ 3 VSS 4 8 NC 7 VDD 6 VOUT 5 NC MCP6032 SOIC, MSOP VOUTA 1 VINA- 2 VINA+ 3 VSS 4 8 VDD 7 VOUTB 6 VINB- 5 VINB+ Typical Application VDD VDD VOUT 10 1.8V to 5.5V IDD 100 k VSS I DD MCP6031 VSS 1 M V DD - V OUT = ------------------------------------------(10 V V) * ( 10 ) MCP6033 SOIC, MSOP NC 1 VIN- 2 VIN+ 3 VSS 4 8 CS 7 VDD 6 VOUT 5 NC MCP6034 SOIC, TSSOP VOUTA 1 VINA- 2 VINA+ 3 VDD 4 VINB+ 5 VINB- 6 VOUTB 7 14 VOUTD 13 VIND- 12 VIND+ 11 VSS 10 VINC+ 9 VINC- 8 VOUTC High Side Battery Current Sensor (c) 2007 Microchip Technology Inc. DS22041A-page 1 MCP6031/2/3/4 1.0 ELECTRICAL CHARACTERISTICS Notice: Stresses above those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. See Section 4.1.2 "Input Voltage and Current Limits" Absolute Maximum Ratings VDD - VSS ........................................................................7.0V Current at Analog Input Pins (VIN+, VIN-). .....................2 mA Analog Inputs (VIN+, VIN-)........... VSS - 1.0V to VDD + 1.0V All Other Inputs and Outputs ......... VSS - 0.3V to VDD + 0.3V Difference Input Voltage ...................................... |VDD - VSS| Output Short-Circuit Current .................................continuous Current at Input Pins ....................................................2 mA Current at Output and Supply Pins ............................30 mA Storage Temperature.....................................-65C to +150C Maximum Junction Temperature (TJ) .......................... +150C ESD protection on all pins (HBM; MM) ................ 4 kV; 400V DC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 1 M to VL (Refer to Figure 1-2 and Figure 1-3). Parameters Input Offset Input Offset Voltage VOS -150 -- 70 -- -- -- -- -- -- VSS - 0.3 70 72 70 72 Open-Loop Gain DC Open-Loop Gain (Large Signal) AOL 95 115 -- dB 0.2V < VOUT < (VDD - 0.2V) RL = 50 k to VL -- 3.0 88 1.0 60 2000 1.0 1013||6 1013||6 -- 95 93 89 93 +150 -- -- 100 -- 5000 -- -- -- VDD + 0.3 -- -- -- -- V VDD = 3.0V, VCM = VDD/3 Input Offset Drift with Temperature VOS/TA Power Supply Rejection Ratio Input Bias Current and Impedance Input Bias Current IB IB IB Input Offset Current Common Mode Input Impedance Differential Input Impedance Common Mode Common Mode Input Voltage Range Common Mode Rejection Ratio VCMR CMRR V dB dB dB dB VCM = -0.3V to 2.1V, VDD = 1.8V VCM = -0.3V to 5.8V, VDD = 5.5V VCM = 2.75V to 5.8V, VDD = 5.5V VCM = -0.3V to 2.75V, VDD = 5.5V IOS ZCM ZDIFF pA pA pA pA ||pF ||pF TA = +85C TA = +125C PSRR V/C TA= -40C to +125C, VDD = 3.0V, VCM = VDD/3 dB VCM = VSS Sym Min Typ Max Units Conditions DS22041A-page 2 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 DC ELECTRICAL SPECIFICATIONS (CONTINUED) Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2 and RL = 1 M to VL (Refer to Figure 1-2 and Figure 1-3). Parameters Output Maximum Output Voltage Swing Output Short-Circuit Current Power Supply Supply Voltage Quiescent Current per Amplifier VDD IQ 1.8 0.4 -- 0.9 5.5 1.35 V A IO = 0, VCM = VDD, VDD = 5.5V VOL, VOH VSS + 10 ISC -- -- -- 5 23 VDD - 10 -- -- mV mA mA RL = 50 k to VL, 0.5V output overdrive VDD = 1.8V VDD = 5.5V Sym Min Typ Max Units Conditions AC ELECTRICAL SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, TA = +25C, VDD = +1.8 to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, CL = 60 pF and RL = 1 M to VL (Refer to Figure 1-2 and Figure 1-3). Parameters AC Response Gain Bandwidth Product Phase Margin Slew Rate Noise Input Noise Voltage Input Noise Voltage Density Input Noise Current Density Eni eni ini -- -- -- 3.9 165 0.6 -- -- -- Vp-p nV/Hz fA/Hz f = 0.1 Hz to 10 Hz f = 1 kHz f = 1 kHz GBWP PM SR -- -- -- 10 65 4.0 -- -- -- kHz V/ms G = +1 Sym Min Typ Max Units Conditions (c) 2007 Microchip Technology Inc. DS22041A-page 3 MCP6031/2/3/4 MCP6033 CHIP SELECT (CS) ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise indicated, VDD = +1.8V to +5.5V, VSS = GND, TA = +25C, VCM = VDD/ 2, VOUT = VDD/2, VL = VDD/2, CL = 60 pF and RL = 1 M to VL (Refer to Figure 1-1). Parameters CS Low Specifications CS Logic Threshold, Low CS Input Current, Low CS High Specifications CS Logic Threshold, High CS Input Current, High GND Current Amplifier Output Leakage CS Dynamic Specifications CS Low to Amplifier Output Turn-on Time CS High to Amplifier Output High-Z CS Hysteresis tON -- 4 100 ms CS 0.2VDD to VOUT = 0.9VDD/2, G = +1 V/V, VIN = VDD/2, RL = 50 k to VL = VSS. CS 0.8VDD to VOUT = 0.1VDD/2, G = +1 V/V, VIN = VDD/2, RL = 50 k to VL = VSS. VIH ICSH ISS IO(LEAK) 0.8VDD -- -- -- 10 -400 10 VDD -- -- -- V pA pA pA CS = VDD CS = VDD CS = VDD VIL ICSL VSS -- -- -10 0.2VDD -- V pA CS = VSS Sym Min Typ Max Units Conditions tOFF -- 10 -- s VHYST -- 0.3VDD -- V CS tON VOUT High-Z VIL VIH tOFF High-Z -0.9 A (typ.) ISS -400 pA (typ.) ICS 10 pA (typ.) -400 pA (typ.) FIGURE 1-1: Timing Diagram for the CS Pin on the MCP6033. DS22041A-page 4 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 TEMPERATURE SPECIFICATIONS Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +5.5V and VSS = GND. Parameters Temperature Ranges Operating Temperature Range Storage Temperature Range Thermal Package Resistances Thermal Resistance, 8L-SOIC Thermal Resistance, 8L-MSOP Thermal Resistance, 14L-SOIC Thermal Resistance, 14L-TSSOP Note: JA JA JA JA -- -- -- -- 163 206 120 100 -- -- -- -- C/W C/W C/W C/W TA TA -40 -65 -- -- +125 +150 C C Note Sym Min Typ Max Units Conditions The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150C. 1.1 Test Circuits The test circuits used for the DC and AC tests are shown in Figure 1-2 and Figure 1-3. The bypass capacitors are laid out according to the rules discussed in Section 4.6 "Supply Bypass". VDD RN MCP603X 2.2 F 0.1 F CL VDD 2 VL RL VOUT VIN RG RF FIGURE 1-2: AC and DC Test Circuit for Most Non-Inverting Gain Conditions. VDD VDD 2 RN MCP603X 2.2 F 0.1 F CL VIN RG RF RL VL VOUT FIGURE 1-3: AC and DC Test Circuit for Most Inverting Gain Conditions. (c) 2007 Microchip Technology Inc. DS22041A-page 5 MCP6031/2/3/4 2.0 Note: TYPICAL PERFORMANCE CURVES The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 400 Input Offset Voltage (V) 1424 Samples VDD = 3.0V VCM = VDD/3 Percentage of Occurrences 14% 12% 10% 8% 6% 4% 2% 0% 0 30 60 -90 -60 -30 90 120 -150 -120 150 Input Offset Voltage (V) 300 200 100 0 -100 -200 -300 -400 -0.5 VDD = 3.0V TA = -40C TA = +25C TA = +85C TA = +125C 0.0 0.5 1.0 1.5 2.0 2.5 3.0 Common Mode Input Voltage (V) 3.5 FIGURE 2-1: Input Offset Voltage with VDD = 3.0V, VCM = VDD/3. 30% 25% 20% 15% 10% 5% 0% -12 -10 -8 -6 -4 -2 0 2 4 6 8 10 12 Input Offset Drift with Temperature (V/C) FIGURE 2-4: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 3.0V. 400 Input Offset Voltage (V) TA = -40C TA = +25C TA = +85C TA = +125C Percentage of Occurrences 1080 Samples VDD = 3.0V VCM = VDD/3 TA = -40C to +125C 300 200 100 0 -100 -200 -300 -400 -0.4 VDD = 1.8V -0.2 0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 Common Mode Input Voltage (V) FIGURE 2-2: Input Offset Voltage Drift with VDD = 3.0V, VCM = VDD/3. 400 Input Offset Voltage (V) 200 100 0 -100 -200 -300 -400 VDD = 5.5V FIGURE 2-5: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 1.8V. 250 200 150 100 50 0 -50 -100 -150 -200 -250 Input Offset Voltage (V) 300 TA = -40C TA = +25C TA = +85C TA = +125C VDD = 3.0V VDD = 5.5V VDD = 1.8V -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Output Voltage (V) Common Mode Input Voltage (V) FIGURE 2-3: Input Offset Voltage vs. Common Mode Input Voltage with VDD = 5.5V. FIGURE 2-6: Output Voltage. Input Offset Voltage vs. DS22041A-page 6 (c) 2007 Microchip Technology Inc. 2.2 MCP6031/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 1,000 100 0.1 1E-1 1 1E+0 10 1E+1 100 1E+2 1k 1E+3 10k 1E+4 100k 1E+5 110 105 100 95 90 85 80 75 70 65 60 -50 Input Noise Voltage Density (nV/Hz) PSRR, CMRR (dB) CMRR (VDD = 1.8V, VCM = -0.3V to 2.1V) CMRR (VDD = 5.5V, VCM = -0.3V to 5.8V) PSRR (VDD = 1.8V to 5.5V, VCM = VSS) Frequency (Hz) -25 0 25 50 75 Ambient Temperature (C) 100 125 FIGURE 2-7: vs. Frequency. Input Noise Voltage Density FIGURE 2-10: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Ambient Temperature. 10000 Input Bias and Offset Currents (pA) 1000 100 10 1 25 Input Offset Current Input Bias Current Input Noise Voltage Density (nV/Hz) 200 175 150 125 100 75 50 25 0 -0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Common Mode Input Voltage (V) f = 1 kHz VDD = 5.5V VDD = 5.5V VCM = VDD 45 65 85 105 Ambient Temperature (C) 125 FIGURE 2-8: Input Noise Voltage Density vs. Common Mode Input Voltage. 100 90 80 70 60 50 40 30 20 10 0 FIGURE 2-11: Input Bias, Offset Currents vs. Ambient Temperature. PSRR- 10000 Input Bias Current (pA) VDD = 5.5V CMRR, PSRR (dB) PSRR+ CMRR 1000 TA = +125C 100 TA = +85C VDD = 5.5V 10 0.1 1 10 Frequency (Hz) 100 1000 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Common Mode Input Voltage (V) FIGURE 2-9: Common Mode Rejection Ratio, Power Supply Rejection Ratio vs. Frequency. FIGURE 2-12: Input Bias Current vs. Common Mode Input Voltage. (c) 2007 Microchip Technology Inc. DS22041A-page 7 MCP6031/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 120 Open-Loop Gain (V/V) VDD = 5.5V @ VCM = VDD VDD = 5.5V @ VCM = VSS 0 Open-Loop Gain 80 60 40 20 0 VDD = 5.5V Open-Loop Phase -60 -90 -120 -150 -180 VDD = 1.8V @ VCM = VDD VDD = 1.8V @ VCM = VSS -50 -25 0 25 50 75 100 125 -20 0.001 0.01 0.1 0 0.01 0 Ambient Temperature (C) -210 1k 100 1E+ 100 100 10k 100k 00 05 Frequency (Hz) 0 1 10 FIGURE 2-13: Quiescent Current vs Ambient Temperature. 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0.0 FIGURE 2-16: Frequency. Open-Loop Gain, Phase vs. TA = +125C TA = +85C TA = +25C TA = -40C DC Open-Loop Gain (dB) VCM = VDD 130 125 120 115 110 105 100 95 90 85 80 Quiescent Current (A/Amplifier) RL = 50 k VSS + 0.2V < VOUT < VDD - 0.2V 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 7.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 Power Supply Voltage (V) Power Supply Voltage VDD (V) FIGURE 2-14: Quiescent Current vs. Power Supply Voltage with VCM = VDD. 1.2 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 FIGURE 2-17: DC Open-Loop Gain vs. Power Supply Voltage. 130 125 VDD = 5.5V 120 115 110 105 VDD = 1.8V 100 95 90 Large Signal AOL 85 RL = 50 k 80 0.00 0.05 0.10 0.15 0.20 0.25 Output Voltage Headroom VDD - VOUT or VOUT - VSS (V) VCM = VSS TA = +125C TA = +85C TA = +25C TA = -40C 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5 Power Supply Voltage (V) 7.0 FIGURE 2-15: Quiescent Current vs. Power Supply Voltage with VCM = VSS. FIGURE 2-18: DC Open-Loop Gain vs. Output Voltage Headroom. DC Open-Loop Gain (dB) Quiescent Current (A/Amplifier) DS22041A-page 8 (c) 2007 Microchip Technology Inc. Open-Loop Phase () 100 -30 Quiescent Current (A/Amplifier) MCP6031/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 130 Channel-to-Channel Seperation (dB) 120 110 100 90 80 70 Input Referred 60 100 20 18 16 14 12 10 8 6 4 2 0 Gain Bandwidth Product VDD = 1.8V G = +1 V/V 1,000 Frequency (Hz) 10,000 -50 -25 0 25 50 75 100 Ambient Temperature (C) FIGURE 2-19: Channel-to-Channel Separation vs. Frequency ( MCP6032/4 only). 20 18 16 14 12 10 8 6 4 2 0 180 160 140 120 100 80 60 40 20 0 FIGURE 2-22: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. Gain Bandwidth Product (dB) 35 Output Short Circuit Current (mA) Phase Margin () 30 25 20 15 10 5 0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Power Supply Voltage (V) TA = -40C TA = +25C TA = +85C TA = +125C Gain Bandwidth Product Phase Margin VDD = 5.5V G = +1 V/V -0.5 0.0 0.5 Common Mode Input Voltage (V) FIGURE 2-20: Gain Bandwidth Product, Phase Margin vs. Common Mode Input Voltage. 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 FIGURE 2-23: Ouput Short Circuit Current vs. Power Supply Voltage. 10 VDD = 5.5V 20 18 16 14 12 10 8 6 4 2 0 Gain Bandwidth Product (kHz) Output Voltage Swing (V Phase Margin () Phase Margin 80 70 60 50 40 30 20 10 P-P ) 90 VDD = 3.0V VDD = 1.8V Gain Bandwidth Product 1 VDD = 5.5V G = +1 V/V -50 0 -25 0 25 50 75 100 125 Ambient Temperature (C) 0.1 10 1K 100 1000 Frequency (Hz) 10K 10000 FIGURE 2-21: Gain Bandwidth Product, Phase Margin vs. Ambient Temperature. FIGURE 2-24: Frequency. Output Voltage Swing vs. (c) 2007 Microchip Technology Inc. DS22041A-page 9 Phase Margin () Phase Margin 90 80 70 60 50 40 30 20 10 0 125 Gain Bandwidth Product (kHz) MCP6031/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 1000 Output Voltage Headroom VDD - V OH, V OL - V SS (mV) VDD - VOH @ VDD = 1.8V VOL - VSS @ VDD = 1.8V 100 10 VDD - VOH @ VDD = 5.5V VOL - VSS @ VDD = 5.5V Output Voltage (20 mV/div) VDD = 5.5V G = +1 V/V 1 10 1m 100 Output Current (A) 10m Time (100 s/Div) FIGURE 2-25: Output Voltage Headroom vs. Output Current. FIGURE 2-28: Pulse Response. Small Signal Non-Inverting 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 VDD = 5.5V RL = 50 k VDD - VOH Output Voltage (20 mV/div) Output Voltage Headroom VDD - V OH or V SS - V OL (mV) VDD = 5.5V G = -1 V/V VSS - VOL -50 -25 0 25 50 75 100 Ambient Temperature (C) 125 Time (100 s/Div) FIGURE 2-26: Output Voltage Headroom vs. Ambient Temperature. 7.0 6.0 Slew Rate (V/ms) 5.0 4.0 3.0 2.0 1.0 -50 -25 0 25 50 75 Ambient Temperature (C) 100 125 Rising Edge, VDD = 5.5V Rising Edge, VDD = 1.8V Falling Edge, VDD = 5.5V Falling Edge, VDD = 1.8V FIGURE 2-29: Response. 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 Small Signal Inverting Pulse Output Voltage (V) VDD = 5.5V G = +1 V/V Time (0.5 ms/div) FIGURE 2-27: Temperature. Slew Rate vs. Ambient FIGURE 2-30: Pulse Response. Large Signal Non-Inverting DS22041A-page 10 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 5.5 5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0.0 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 Chip Select Voltage (V) CS Input High to Low CS Input Low to High Output High-Z Output On Hysteresis VDD = 5.5V Output Voltage (V) VDD = 5.5V G = -1 V/V Time (0.5 ms/div) FIGURE 2-31: Response. 6.0 5.0 Output Voltage (V) 4.0 3.0 2.0 1.0 0.0 -1.0 VDD = 5.0V G = +2 V/V Large Signal Inverting Pulse FIGURE 2-34: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 5.5V. 2.1 VIN VOUT Internal CS Switch Ouptut (V) 1.8 Ouptut Voltage (V) 1.5 1.2 0.9 0.6 0.3 0.0 CS Input High to Low Output On Hysteresis VDD = 3.0V CS Input Low to High Output High-Z Time (2 ms/div) 0.0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3.0 Chip Select Voltage (V) FIGURE 2-32: The MCP6031/2/3/4 family shows no phase reversal . 6.0 5.0 4.0 3.0 2.0 1.0 0.0 -1.0 -2.0 -3.0 -4.0 -5.0 -6.0 -7.0 -8.0 7.0 FIGURE 2-35: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 3.0V. 1.5 Ouptut Voltage (V) 1.2 Output On VDD = 1.8V Chip Select Voltage (V) 6.0 5.0 Chip Select Output On Output Voltage (V) 0.9 Hysteresis 4.0 3.0 2.0 Output High-Z VDD = 5.5V G = +1 V/V RL = 50 k to VSS Output High-Z 0.6 0.3 0.0 0.0 CS Input High to Low CS Input Low to High 1.0 0.0 Output High-Z Time (1 ms/div) 0.2 0.4 0.6 0.8 1.0 1.2 1.4 Chip Select Voltage (V) 1.6 1.8 FIGURE 2-33: Chip Select (CS) to Amplifier Output Response Time (MCP6033 only). FIGURE 2-36: Chip Select (CS) Hysteresis (MCP6033 only) with VDD = 1.8V. (c) 2007 Microchip Technology Inc. DS22041A-page 11 MCP6031/2/3/4 Note: Unless otherwise indicated, TA = +25C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, VOUT VDD/2, VL = VDD/2, RL = 1 M to VL and CL = 60 pF. 100000 100k Closed Loop Output Impedance () 10k 10000 1k 1000 100 100 10 10 1 1 1 10 100 1k 1000 10k 10000 100k 100000 Frequency (Hz) GN: 101 V/V 11 V/V 1 V/V 10m 1.00E-02 1m 1.00E-03 100 1.00E-04 10 1.00E-05 1 1.00E-06 100n 1.00E-07 10n 1.00E-08 1n 1.00E-09 100p 1.00E-10 10p 1.00E-11 1p 1.00E-12 -IIN (A) +125C +85C +25C -40C -1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0 VIN (V) FIGURE 2-37: Closed Loop Output Impedance vs. Frequency. FIGURE 2-38: Measured Input Current vs. Input Voltage (below VSS). DS22041A-page 12 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 3.0 PIN DESCRIPTIONS Descriptions of the pins are listed in Table 3-1. TABLE 3-1: MCP6031 6 2 3 7 -- -- -- -- -- -- 4 -- -- -- -- 1, 5, 8 PIN FUNCTION TABLE MCP6032 1 2 3 8 5 6 7 -- -- -- 4 -- -- -- -- -- MCP6033 6 2 3 7 -- -- -- -- -- -- 4 -- -- -- 8 1, 5 MCP6034 1 2 3 4 5 6 7 8 9 10 11 12 13 14 -- -- Symbol VOUT, VOUTA VIN-, VINA- VIN+, VINA+ VDD VINB+ VINB- VOUTB VOUTC VINC- VINC+ VSS VIND+ VIND- VOUTD CS NC Description Analog Output (op amp A) Inverting Input (op amp A) Non-inverting Input (op amp A) Positive Power Supply Non-inverting Input (op amp B) Inverting Input (op amp B) Analog Output (op amp B) Analog Output (op amp C) Inverting Input (op amp C) Non-inverting Input (op amp C) Negative Power Supply Non-inverting Input (op amp D) Inverting Input (op amp D) Analog Output (op amp D) Chip Select No Internal Connection 3.1 Analog Outputs 3.4 Power Supply (VSS and VDD) The output pins are low-impedance voltage sources. 3.2 Analog Inputs The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents. The positive power supply (VDD) is 1.8V to 5.5V higher than the negative power supply (VSS). For normal operation, the other pins are at voltages between VSS and VDD. Typically, these parts are used in a single (positive) supply configuration. In this case, VSS is connected to ground and VDD is connected to the supply. VDD will need a local bypass capacitor (typically 0.01 F to 0.1 F) within 2 mm of the VDD pin. These parts can share a bulk capacitor with analog parts (typically 2.2 F to 10 F) within 100 mm of the VDD pin, but it is not required. 3.3 Chip Select Input (CS) This is a CMOS, Schmitt-trigerred input that places the MCP6033 op amp into a low-power mode of operation. (c) 2007 Microchip Technology Inc. DS22041A-page 13 MCP6031/2/3/4 4.0 APPLICATION INFORMATION VDD D1 V1 R1 V2 R2 R3 VSS - (minimum expected V1) 2 mA VSS - (minimum expected V2) R2 > 2 mA R1 > MCP603X D2 The MCP6031/2/3/4 family of op amps is manufactured using Microchip's state-of-the-art CMOS process and is specifically designed for low-power, high precision applications. 4.1 4.1.1 Rail-to-Rail Input PHASE REVERASAL The MCP6031/2/3/4 op amps are designed to prevent phase reversal when the input pins exceed the supply voltages. Figure 2-32 shows the input voltage exceeding the supply voltage without any phase reversal. 4.1.2 INPUT VOLTAGE AND CURRENT LIMITS The ESD protection on the inputs can be depicted as shown in Figure 4-1. This structure was chosen to protect the input transistors and to minimize input bias current (IB). The input ESD diodes clamp the inputs when they try to go more than one diode drop below VSS. They also clamp any voltage that go too far above VDD; their breakdown voltage is high enough to allow normal operation and low enough to bypass ESD events within the specified limits. FIGURE 4-2: Inputs. Protecting the Analog VDD Bond Pad It is also possible to connect the diodes to the left of the resistors R1 and R2. In this case, the currents through the diodes D1 and D2 need to be limited by some other mechanism. The resistors then serve as in-rush current limiters; the DC currents into the input pins (VIN+ and VIN-) should be very small. A significant amount of current can flow out of the inputs when the common mode voltage (VCM) is below ground (VSS). 4.1.3 Input Stage Bond VIN- Pad NORMAL OPERATION VIN+ Bond Pad VSS Bond Pad The input stage of the MCP6031/2/3/4 op amps uses two differential input stages in parallel. One operates at a low common mode input voltage (VCM), while the other operates at a high VCM. With this topology, the device operates with a VCM up to 300 mV above VDD and 300 mV below VSS. The input offset voltage is measured at VCM = VSS - 0.3V and VDD + 0.3V to ensure proper operation. FIGURE 4-1: Structures. Simplified Analog Input ESD In order to prevent damage and/or improper operation of these op amps, the circuit they are in must limit the voltages and currents at the VIN+ and VIN- pins (see Absolute Maximum Ratings at the beginning of Section 1.0 "Electrical Characteristics"). Figure 4-2 shows the recommended approach to protecting these inputs. The internal ESD diodes prevent the input pins (VIN+ and VIN-) from going too far below ground, and the resistors R1 and R2 limit the possible current drawn out of the input pins. Diodes D1 and D2 prevent the input pins (VIN+ and VIN-) from going too far above VDD. When implemented as shown, resistors R1 and R2 also limit the current through D1 and D2. DS22041A-page 14 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 4.2 Rail-to-Rail Output - VIN MCP603X + RISO VOUT CL The output voltage range of the MCP6031/2/3/4 op amps is VSS + 10 mV (minimum) and VDD - 10 mV (maximum) when RL = 50 k is connected to VDD/2 and VDD = 5.5V. Refer to Figures 2-25 and 2-26 for more information. 4.3 Output Loads and Battery Life FIGURE 4-3: Output resistor, RISO stabilizes large capacitive loads. Figure 4-4 gives recommended RISO values for different capacitive loads and gains. The x-axis is the normalized load capacitance (CL/GN), where GN is the circuit's noise gain. For non-inverting gains, GN and the Signal Gain are equal. For inverting gains, GN is 1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V). 1000000 1M Recommended R ISO () The MCP6031/2/3/4 op amp family has outstanding quiescent current, which supports battery-powered applications. There is minimal quiescent current glitching when Chip Select (CS) is raised or lowered. This prevents excessive current draw, and reduced battery life, when the part is turned off or on. Heavy resistive loads at the output can cause excessive battery drain. Driving a DC voltage of 2.5V across a 100 k load resistor will cause the supply current to increase by 25 A, depleting the battery 28 times as fast as IQ (0.9 A, typical) alone. High frequency signals (fast edge rate) across capacitive loads will also significantly increase supply current. For instance, a 0.1 F capacitor at the output presents an AC impedance of 15.9 k (1/2fC) to a 100 Hz sinewave. It can be shown that the average power drawn from the battery by a 5.0 Vp-p sinewave (1.77 Vrms), under these conditions, is 100k 100000 GN: 1 V/V 2 V/V 5 V/V 10k 10000 EQUATION 4-1: PSupply = (VDD - VSS) (IQ + VL(p-p) f CL ) = (5V)(0.9 A + 5.0Vp-p * 100Hz * 0.1F) = 4.5 W + 50 W This will drain the battery about 12 times as fast as IQ alone. 1k 1000 10p 100p 1n 10n 100n 1 1.E-11 1.E-10 1.E-09 1.E-08 1.E-07 1.E-06 Normalized Load Capacitance; CL/GN (F) FIGURE 4-4: Recommended RISO values for Capacitive Loads. After selecting RISO for your circuit, double-check the resulting frequency response peaking and step response overshoot. Modify RISO's value until the response is reasonable. Bench evaluation and simulations with the MCP6031/2/3/4 SPICE macro model are very helpful. 4.4 Capacitive Loads Driving large capacitive loads can cause stability problems for voltage feedback op amps. As the load capacitance increases, the feedback loop's phase margin decreases and the closed-loop bandwidth is reduced. This produces gain peaking in the frequency response, with overshoot and ringing in the step response. While a unity-gain buffer (G = +1) is the most sensitive to capacitive loads, all gains show the same general behavior. When driving large capacitive loads with these op amps (e.g., > 100 pF when G = +1), a small series resistor at the output (RISO in Figure 4-3) improves the feedback loop's phase margin (stability) by making the output load resistive at higher frequencies. The bandwidth will be generally lower than the bandwidth with no capacitance load. 4.5 MCP6033 CHIP SELECT (CS) The MCP6033 is a single op amp with Chip Select (CS). When CS is pulled high, the supply current drops to 0.4 nA (typical) and flows through the CS pin to VSS. When this happens, the amplifier output is put into a high impedance state. By pulling CS low, the amplifier is enabled. If the CS pin is left floating, the amplifier will not operate properly. Figure 1-1 shows the output voltage and supply current response to a CS pulse. (c) 2007 Microchip Technology Inc. DS22041A-page 15 MCP6031/2/3/4 4.6 Supply Bypass Guard Ring VIN- VIN+ VSS With this family of operational amplifiers, the power supply pin (VDD for single-supply) should have a local bypass capacitor (i.e., 0.01 F to 0.1 F) within 2 mm for good high-frequency performance. It also needs a bulk capacitor (i.e., 1 F or larger) within 100 mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. 4.7 Unused Op Amps An unused op amp in a quad package (MCP6034) should be configured as shown in Figure 4-5. These circuits prevent the output from toggling and causing crosstalk. Circuit A can use any reference voltage between the supplies, provides a buffered DC voltage,and minimizes the supply current draw of the unused op amp. Circuit B uses fewer components and operates as a comparator; it may draw more current. 1/4 MCP6034 (A) VDD R VDD 1/4 MCP6034 (B) VDD FIGURE 4-6: for Inverting Gain. 1. Example Guard Ring Layout 2. R Non-inverting Gain and Unity-Gain Buffer: a. Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b. Connect the guard ring to the inverting input pin (VIN-). This biases the guard ring to the common mode input voltage. Inverting Gain and Transimpedance Gain Amplifiers (convert current to voltage, such as photo detectors): a. Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the op amp (e.g., VDD/2 or ground). b. Connect the inverting pin (VIN-) to the input with a wire that does not touch the PCB surface. FIGURE 4-5: Unused Op Amps. 4.8 PCB Surface Leakage In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012. A 5V difference would cause 5 pA of current to flow; which is greater than the MCP6031/2/3/4 family's bias current at +25C (1.0 pA, typical). The easiest way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 4-6. DS22041A-page 16 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 4.9 4.9.1 Application Circuits BATTERY CURRENT SENSING 4.9.2 PRECISION COMPARATOR The MCP6031/2/3/4 op amps' Common Mode Input Range, which goes 0.3V beyond both supply rails, supports their use in high side and low side battery current sensing applications. The ultra low quiescent current (0.9 A, typical) helps prolong battery life, and the rail-to-rail output supports detection of low currents. Figure 4-7 shows a high side battery current sensor circuit. The 10 resistor is sized to minimize power losses. The battery current (IDD) through the 10 resistor causes its top terminal to be more negative than the bottom terminal. This keeps the common mode input voltage of the op amp below VDD, which is within its allowed range. The output of the op amp will also be below VDD, which is within its Maximum Output Voltage Swing specification. VDD VDD VOUT 10 1.8V to 5.5V IDD 100 k VSS MCP6031 VSS 1 M Use high gain before a comparator to improve the latter's input offset performance. Figure 4-8 shows a gain of 11 V/V placed before a comparator. The reference voltage VREF can be any value between the supply rails. VIN MCP6031 100 k 1 M VREF MCP6541 VOUT FIGURE 4-8: Comparator. Precision, Non-inverting V DD - V OUT I DD = ------------------------------------------(10 V V) * ( 10 ) FIGURE 4-7: Sensor. High Side Battery Current (c) 2007 Microchip Technology Inc. DS22041A-page 17 MCP6031/2/3/4 5.0 DESIGN AIDS 5.5 Microchip provides the basic design aids needed for the MCP6031/2/3/4 family of op amps. Analog Demonstration and Evaluation Boards 5.1 SPICE Macro Model The latest SPICE macro model for the MCP6031/2/3/4 op amps is available on the Microchip web site at www.microchip.com. This model is intended to be an initial design tool that works well in the op amp's linear region of operation over the temperature range. See the model file for information on its capabilities. Bench testing is a very important part of any design and cannot be replaced with simulations. Also, simulation results using this macro model need to be validated by comparing them to the data sheet specifications and characteristic curves. Microchip offers a broad spectrum of Analog Demonstration and Evaluation Boards that are designed to help you achieve faster time to market. For a complete listing of these boards and their corresponding user's guides and technical information, visit the Microchip web site at www.microchip.com/analogtools. Two of our boards that are especially useful are: * P/N SOIC8EV: 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board * P/N SOIC14EV: 14-Pin SOIC/TSSOP/DIP Evaluation Board 5.6 Application Notes 5.2 FilterLab(R) Software Microchip's FilterLab(R) software is an innovative software tool that simplifies analog active filter (using op amps) design. Available at no cost from the Microchip web site at www.microchip.com/filterlab, the FilterLab design tool provides full schematic diagrams of the filter circuit with component values. It also outputs the filter circuit in SPICE format, which can be used with the macro model to simulate actual filter performance. The following Microchip Application Notes are available on the Microchip web site at www.microchip.com/appnotes and are recommended as supplemental reference resources. AN003: "Select the Right Operational Amplifier for your Filtering Circuits", DS00003 AN722: "Operational Amplifier Topologies and DC Specifications", DS00722 AN723: "Operational Amplifier AC Specifications and Applications", DS00723 AN884: "Driving Capacitive Loads With Op Amps", DS00884 AN990: "Analog Sensor Conditioning Circuits - An Overview", DS00990 These application notes and others are listed in the design guide: "Signal Chain Design Guide", DS21825 5.3 MindiTM Simulation Tool Microchip's MindiTM simulation tool aids in the design of various circuits useful for active filter, amplifier and power-management applications. It is a free online simulation tool available from the Microchip web site at www.microchip.com/mindi. This interactive simulator enables designers to quickly generate circuit diagrams, simulate circuits. Circuits developed using the Mindi simulation tool can be downloaded to a personal computer or workstation. 5.4 MAPS (Microchip Advanced Part Selector) MAPS is a software tool that helps semiconductor professionals efficiently identify Microchip devices that fit a particular design requirement. Available at no cost from the Microchip website at www.microchip.com/ maps, the MAPS is an overall selection tool for Microchip's product portfolio that includes Analog, Memory, MCUs and DSCs. Using this tool you can define a filter to sort features for a parametric search of devices and export side-by-side technical comparasion reports. Helpful links are also provided for Datasheets, Purchase, and Sampling of Microchip parts. DS22041A-page 18 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 6.0 6.1 PACKAGING INFORMATION Package Marking Information 8-Lead MSOP XXXXXX YWWNNN Example: 6031E 711256 8-Lead SOIC (150 mil) XXXXXXXX XXXXYYWW NNN Example: MCP6033E e3 SN^^0711 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. (c) 2007 Microchip Technology Inc. DS22041A-page 19 MCP6031/2/3/4 Package Marking Information (Continued) 14-Lead SOIC (150 mil) (MCP6034) Example: XXXXXXXXXX XXXXXXXXXX YYWWNNN MCP6034 e3 E/SL^^ 0711256 14-Lead TSSOP (MCP6034) Example: XXXXXX YYWW NNN 6034EST 0711 256 Legend: XX...X Y YY WW NNN e3 * Note: Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week `01') Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. DS22041A-page 20 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 8-Lead Plastic Micro Small Outline Package (MS) [MSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 b A A2 c e A1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Foot Length Footprint Foot Angle Lead Thickness N e A A2 A1 E E1 D L L1 c L1 MILLIMETERS MIN NOM 8 0.65 BSC - 0.75 0.00 - 0.85 - 4.90 BSC 3.00 BSC 3.00 BSC 0.40 0 0.08 0.60 0.95 REF - - 8 0.23 0.80 1.10 0.95 0.15 MAX L Lead Width b 0.22 - 0.40 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-111B (c) 2007 Microchip Technology Inc. DS22041A-page 21 MCP6031/2/3/4 8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D e N E E1 NOTE 1 1 2 3 b h c h A A2 A1 L L1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 c b 0 0.17 0.31 5 5 0.25 0.40 - 1.25 0.10 MIN MILLIMETERS NOM 8 1.27 BSC - - - 6.00 BSC 3.90 BSC 4.90 BSC - - 1.04 REF - - - - - 8 0.25 0.51 15 0.50 1.27 1.75 - 0.25 MAX 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-057B DS22041A-page 22 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 14-Lead Plastic Small Outline (SL) - Narrow, 3.90 mm Body [SOIC] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 1 2 b 3 e h h A2 c A A1 L L1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Overall Length Chamfer (optional) Foot Length Footprint Foot Angle Lead Thickness Lead Width Mold Draft Angle Top Mold Draft Angle Bottom N e A A2 A1 E E1 D h L L1 c b 0 0.17 0.31 5 5 0.25 0.40 - 1.25 0.10 MIN MILLIMETERS NOM 14 1.27 BSC - - - 6.00 BSC 3.90 BSC 8.65 BSC - - 1.04 REF - - - - - 8 0.25 0.51 15 0.50 1.27 1.75 - 0.25 MAX 15 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Significant Characteristic. 3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 4. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-065B (c) 2007 Microchip Technology Inc. DS22041A-page 23 MCP6031/2/3/4 14-Lead Plastic Thin Shrink Small Outline (ST) - 4.4 mm Body [TSSOP] Note: For the most current package drawings, please see the Microchip Packaging Specification located at http://www.microchip.com/packaging D N E E1 NOTE 1 12 e b A A2 c A1 Units Dimension Limits Number of Pins Pitch Overall Height Molded Package Thickness Standoff Overall Width Molded Package Width Molded Package Length Foot Length Footprint Foot Angle Lead Thickness N e A A2 A1 E E1 D L L1 c L1 MILLIMETERS MIN NOM 14 0.65 BSC - 0.80 0.05 4.30 4.90 0.45 0 0.09 - 1.00 - 6.40 BSC 4.40 5.00 0.60 1.00 REF - - 8 0.20 4.50 5.10 0.75 1.20 1.05 0.15 MAX L Lead Width b 0.19 - 0.30 Notes: 1. Pin 1 visual index feature may vary, but must be located within the hatched area. 2. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15 mm per side. 3. Dimensioning and tolerancing per ASME Y14.5M. BSC: Basic Dimension. Theoretically exact value shown without tolerances. REF: Reference Dimension, usually without tolerance, for information purposes only. Microchip Technology Drawing C04-087B DS22041A-page 24 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 APPENDIX A: REVISION HISTORY Revision A (March 2007) * Original Release of this Document. (c) 2007 Microchip Technology Inc. DS22041A-page 25 MCP6031/2/3/4 NOTES: DS22041A-page 26 (c) 2007 Microchip Technology Inc. MCP6031/2/3/4 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. Device X Temperature Range /XX Package Examples: a) b) Single Op Amp Single Op Amp (Tape and Reel) Dual Op Amp Dual Op Amp (Tape and Reel) Single Op Amp with Chip Select Single Op Amp with Chip Select (Tape and Reel) Quad Op Amp Quad Op Amp (Tape and Reel) Device: MCP6031: MCP6031T: MCP6032: MCP6032T: MCP6033: MCP6033T: MCP6034: MCP6034T: c) d) Extended Temperature, 8LD SOIC package. MCP6031T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC package. MCP6031-E/MS: Extended Temperature, 8LD MSOP package. MCP6031T-E/MS: Tape and Reel, Extended Temperature, 8LD MSOP package. Extended Temperature, 8LD SOIC package. MCP6032T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC package. MCP6032-E/MS: Extended Temperature, 8LD MSOP package MCP6032T-E/MS: Tape and Reel Extended Temperature, 8LD MSOP package. Extended Temperature, 8LD SOIC package. MCP6033T-E/SN: Tape and Reel, Extended Temperature, 8LD SOIC package. MCP6033-E/MS: Extended Temperature, 8LD MSOP package. MCP6033T-E/MS: Tape and Reel, Extended Temperature, 8LD MSOP package. Extended Temperature, 14LD SOIC package. MCP6034T-E/SL: Tape and Reel, Extended Temperature, 14LD SOIC package. MCP6034-E/ST: Extended Temperature, 14LD TSSOP package. MCP6034T-E/ST: Tape and Reel, Extended Temperature, 14LD TSSOP package. MCP6034-E/SL: MCP6033-E/SN: MCP6032-E/SN: MCP6031-E/SN: a) b) Temperature Range: Package: E MS SL SN ST = -40C to +125C = = = = Plastic MSOP, 8-lead Plastic SOIC (150 mil Body), 14-lead Plastic SOIC, (150 mil Body), 8-lead Plastic TSSOP (4.4mm Body), 14-lead c) d) a) b) c) d) a) b) c) d) (c) 2007 Microchip Technology Inc. DS22041A-page 27 MCP6031/2/3/4 NOTES: DS22041A-page 28 (c) 2007 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: * * * Microchip products meet the specification contained in their particular Microchip Data Sheet. Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. Microchip is willing to work with the customer who is concerned about the integrity of their code. Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as "unbreakable." * * Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip's code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. It is your responsibility to ensure that your application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, INCLUDING BUT NOT LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE, MERCHANTABILITY OR FITNESS FOR PURPOSE. Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights. Trademarks The Microchip name and logo, the Microchip logo, Accuron, dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC, PICmicro, PICSTART, PRO MATE, PowerSmart, rfPIC, and SmartShunt are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. AmpLab, FilterLab, Linear Active Thermistor, Migratable Memory, MXDEV, MXLAB, PS logo, SEEVAL, SmartSensor and The Embedded Control Solutions Company are registered trademarks of Microchip Technology Incorporated in the U.S.A. Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. (c) 2007, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company's quality system processes and procedures are for its PIC(R) MCUs and dsPIC(R) DSCs, KEELOQ(R) code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip's quality system for the design and manufacture of development systems is ISO 9001:2000 certified. (c) 2007 Microchip Technology Inc. DS22041A-page 29 WORLDWIDE SALES AND SERVICE AMERICAS Corporate Office 2355 West Chandler Blvd. Chandler, AZ 85224-6199 Tel: 480-792-7200 Fax: 480-792-7277 Technical Support: http://support.microchip.com Web Address: www.microchip.com Atlanta Duluth, GA Tel: 678-957-9614 Fax: 678-957-1455 Boston Westborough, MA Tel: 774-760-0087 Fax: 774-760-0088 Chicago Itasca, IL Tel: 630-285-0071 Fax: 630-285-0075 Dallas Addison, TX Tel: 972-818-7423 Fax: 972-818-2924 Detroit Farmington Hills, MI Tel: 248-538-2250 Fax: 248-538-2260 Kokomo Kokomo, IN Tel: 765-864-8360 Fax: 765-864-8387 Los Angeles Mission Viejo, CA Tel: 949-462-9523 Fax: 949-462-9608 Santa Clara Santa Clara, CA Tel: 408-961-6444 Fax: 408-961-6445 Toronto Mississauga, Ontario, Canada Tel: 905-673-0699 Fax: 905-673-6509 ASIA/PACIFIC Asia Pacific Office Suites 3707-14, 37th Floor Tower 6, The Gateway Habour City, Kowloon Hong Kong Tel: 852-2401-1200 Fax: 852-2401-3431 Australia - Sydney Tel: 61-2-9868-6733 Fax: 61-2-9868-6755 China - Beijing Tel: 86-10-8528-2100 Fax: 86-10-8528-2104 China - Chengdu Tel: 86-28-8665-5511 Fax: 86-28-8665-7889 China - Fuzhou Tel: 86-591-8750-3506 Fax: 86-591-8750-3521 China - Hong Kong SAR Tel: 852-2401-1200 Fax: 852-2401-3431 China - Qingdao Tel: 86-532-8502-7355 Fax: 86-532-8502-7205 China - Shanghai Tel: 86-21-5407-5533 Fax: 86-21-5407-5066 China - Shenyang Tel: 86-24-2334-2829 Fax: 86-24-2334-2393 China - Shenzhen Tel: 86-755-8203-2660 Fax: 86-755-8203-1760 China - Shunde Tel: 86-757-2839-5507 Fax: 86-757-2839-5571 China - Wuhan Tel: 86-27-5980-5300 Fax: 86-27-5980-5118 China - Xian Tel: 86-29-8833-7250 Fax: 86-29-8833-7256 ASIA/PACIFIC India - Bangalore Tel: 91-80-4182-8400 Fax: 91-80-4182-8422 India - New Delhi Tel: 91-11-4160-8631 Fax: 91-11-4160-8632 India - Pune Tel: 91-20-2566-1512 Fax: 91-20-2566-1513 Japan - Yokohama Tel: 81-45-471- 6166 Fax: 81-45-471-6122 Korea - Gumi Tel: 82-54-473-4301 Fax: 82-54-473-4302 Korea - Seoul Tel: 82-2-554-7200 Fax: 82-2-558-5932 or 82-2-558-5934 Malaysia - Penang Tel: 60-4-646-8870 Fax: 60-4-646-5086 Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 EUROPE Austria - Wels Tel: 43-7242-2244-39 Fax: 43-7242-2244-393 Denmark - Copenhagen Tel: 45-4450-2828 Fax: 45-4485-2829 France - Paris Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79 Germany - Munich Tel: 49-89-627-144-0 Fax: 49-89-627-144-44 Italy - Milan Tel: 39-0331-742611 Fax: 39-0331-466781 Netherlands - Drunen Tel: 31-416-690399 Fax: 31-416-690340 Spain - Madrid Tel: 34-91-708-08-90 Fax: 34-91-708-08-91 UK - Wokingham Tel: 44-118-921-5869 Fax: 44-118-921-5820 12/08/06 DS22041A-page 30 (c) 2007 Microchip Technology Inc. |
Price & Availability of MCP6034TEMS
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |